Is Intel lagging behind in semiconductor manufacturing? The truth is that they are the only ones who are too honest

On April 19, 1965, Gordon Moore, then the co-founder of Fairchild Semiconductor, published an industry analysis article in the magazine. In this article, Moore, based on his understanding of semiconductor technology, boldly infers that “the number of components contained in integrated circuits can be doubled approximately every year at the minimum cost.” < / P > < p > Yes, this is the famous “Moore’s law”. For the readers of our three changes life, we may know that we have made a detailed analysis on the process of “Moore’s law” constantly distorted and alienated in the semiconductor industry in recent years, and why it will not be “outdated”. However, at that time, we mainly focused on the behavior of manufacturers to tamper with the original text of Moore’s law, and the role of PC software in it. However, we did not mention some dirty things about the semiconductor industry itself. However, recently, Arne verheyde, an industry analyst and a writer of Toms hardware, recently “pierced” this layer of window paper in the semiconductor manufacturing industry with an article. In the article, he says bluntly, “most of this is marketing games.” As a matter of fact, the concept of “manufacturing process” will not be unfamiliar to anyone who pays close attention to the field of science and technology. Although not everyone knows the original definition of process, it has become a consensus among consumers that “the smaller the process number, the more advanced the process will be and the higher the chip performance will be”. < / P > < p > but what if the “digital” of the semiconductor process itself is not credible? What if the 7Nm, 14nm, 28nm, even 130nm that we have always believed to be false? < p > < p > according to Arne, the “process number” in the semiconductor industry has actually begun to “decouple” from the actual transistor internal size since the PC processor started frequency competition. In other words, the earliest process water injection can be traced back to the 1990s. So the question is, what does process number mean if it doesn’t really mean transistor size? < / P > < p > the answer is very simple, because “process number” has long been the code for manufacturers to simply express the relationship between the old and the new process. For the uninformed media and consumers, the process number that most manufacturers will “progress” every time they upgrade the process has actually become the best commercial propaganda means. For example, in 2014, TSMC’s most advanced semiconductor process was “20nm”. At this time, semiconductor technology ushered in a major change. The new design of FinFET transistor was born. Intel was ready to use it in its own 14nm process. TSMC also took good care of it and introduced the new design of FinFET transistor into their new production line. < p > < p > according to Arne, FinFET is a good thing because it does improve transistor performance and reduce leakage. But the problem is that TSMC only introduced new transistor designs when upgrading its new technology, and did not further reduce the size of transistors. So, what is the name of TSMC’s new technology? Is it “20nm FinFET”? < / P > < p > No, because TSMC finally decided to name their new process “16nm”. Objectively speaking, although the new technology is indeed a replacement, and indeed improves the performance of the chip produced, its accuracy itself has not improved. This actually means that TSMC’s so-called “16nm” should be understood as “a new generation of technology than the so-called 20nm process”. Just like the current 7Nm process, it refers to “a new generation of technology than the previously claimed 10 nm process”. As for whether its real transistor size level is 7Nm or 10nm or larger, only the manufacturer can make it clear. < / P > < p > If semiconductor manufacturers only use these “process numbers” as “codes” to facilitate the management and identification of new and old relationships between different internal processes, we can at most blame the manufacturers for being dishonest. But the problem is that they not only talk about the “numbers” of semiconductor manufacturing process internally, but also turn this kind of lie into a propaganda means to keep up with each other. The comparison is that who dares to boast and whose lie is bigger and rounder. Let’s take the example of TSMC’s naming the improved “20nm” process as “16nm” on the premise that the actual transistor density has not increased. According to news from other channels a few years ago, TSMC dared to do so simply because it was “robbed of the limelight” by Samsung next door. At that time, they were forced to “catch up with the new technology” of FET, but they did not have to catch up with the new technology of “14nm”. < p > < p > from a published statistical table of semiconductor process size at that time, we can see that the gate electrode spacing, fin spacing and metal gate spacing can truly measure the transistor manufacturing process Both TSMC’s 16nm and Samsung’s 14nm are far away from the “real” 14nm process introduced by Intel later. Even in some indicators, the new processes of the former two are only equivalent to Intel’s 22nm old process in some indicators, which is equivalent to further supporting the saying of “digital fabrication in process”. However, TSMC and Samsung also know that their semiconductor process numbers can not withstand the scrutiny of the industry. For example, at the hot chips chip technology conference in 2019, Huang Hansen, deputy general manager of TSMC technology research, took the initiative and publicly admitted the “counterfeiting” of process digital. In his original words, “the process node has become a marketing game, which has nothing to do with the characteristics of technology itself.” Obviously, for today’s semiconductor chip manufacturing industry, this kind of “manufacturing process fraud” has not only a long history, but also involves all aspects of the industry. For the upstream enterprises, manufacturing process fraud actually creates an information asymmetry situation between wafer less chip design companies and chip manufacturers, which not only aggravates the industry gap, but also sometimes even leads to product manufacturing problems, resulting in production reduction, delayed release, or poor performance and other consequences. For most consumers, blindly believing in “process digital” will make it impossible for us to objectively understand the real performance or technical difference between chips. < / P > < p > for example, according to a semiconductor process index comparison table published by CITIC Securities Research Institute in 2019, it is not difficult to find that among the latest semiconductor process technologies, Intel’s “nominal 10nm” process is actually the same as that of Samsung and TSMC in many aspects, and even much better than TSMC’s first generation 7Nm process. But if you tell an ordinary consumer that Intel’s 10nm is exactly the same as other 7Nm’s, it’s obviously hard to convince ordinary people. After all, on the one hand, not everyone can understand the complicated and complicated industrial indicator tables. On the other hand, the old and now erroneous concept of “process number” has been deeply rooted in the hearts of the people. < / P > < p > because of this, Intel proposed a new indicator in 2017 to describe the true transistor manufacturing level of each generation of process technology. This indicator has been further explained in Arne verheyde’s article recently, which is the density of logic transistors in MTR / mm. < p > < p > compared with the “process numbers” of different standards, the logic transistor density measurement abandons the propaganda elements out of commercial motives, and uses the pure density of transistors on the wafer to measure the advantages and disadvantages of different processes. According to this measurement method, Intel’s current 10 nm + process can actually achieve 100 million transistors per square millimeter, that is, 100 MTR / mm. For comparison, TSMC’s “7Nm EUV” process transistor density is 90 million per square millimeter, that is, 90 MTR / mm. It is not difficult to see that in fact, the most advanced 7Nm process is weaker than the competitor’s “10nm +” in semiconductor manufacturing level. This once again confirms how serious and misleading the manufacturing process digital fraud has been over the years. < p > < p > not only that, Arne verheyde also provided more process transistor density data known by Intel and TSMC in his article. Among them, Intel’s 7Nm transistor density is 200-240mtr / mm, while TSMC’s “5nm” process, which has just been put into production, is only 170mtr / mm; in TSMC’s “3nm” process, the transistor density is 290mtr / mm. For comparison, Intel’s 5nm will reach the level of 400-480mtr / mm. In other words, the manufacturing level of Intel’s “next generation” process will be 1.5 times or even higher than that of TSMC’s “next generation” process. Of course, we can say that TSMC is a bit too boastful to stop blowing. But on the contrary, when other competitors in the industry are pouring water and bragging about the process number, why does Intel insist on its own naming standard, instead of changing 14nm + + + to 11nm, and still insist on pursuing that every process change must bring 100% increase in transistor density? Continue ReadingDeveloped a “plug and play” solar power generation scheme, and “5B” won a $12 million round a financing